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 800mA Voltage-Scaling Step-Down Converter General Description
The AAT1142 SwitchReg is a dynamically programmable 2.2MHz step-down converter with an input voltage range of 2.7V to 5.5V and output from 0.6V to 2.0V. Its low supply current, high level of integration, and small footprint make the AAT1142 the ideal choice for microprocessor core power in systems such as smartphones. The 2.2MHz switching frequency allows the use of a small external inductor and capacitors. Peak current mode control and internal compensation provide stable operation and fast voltage response without over/undershoot or ringing. The AAT1142 delivers up to 800mA of output current while consuming 35A of typical no load quiescent current. Dynamic Voltage Management is provided through I2C or AnalogicTech's S2CwireTM (Simple Serial ControlTM) single wire interface. The user can program the output from 0.6V to 2.0V in 50mV steps. The AAT1142 optimizes power efficiency throughout the load range via PWM/PFM mode. Pulling the MODE/SYNC pin high enables PWM Only mode, maintaining constant frequency and low noise across the operating range. Alternatively, the converter may be synchronized to an external clock input via the MODE/SYNC pin. Over-temperature and short-circuit protection safeguard the AAT1142 and system components from damage. The AAT1142 is available in a Pb-free, space-saving 2.85x3.0x1.0mm TSOPJW-12 package or a Pb-free, low-profile 3x3x0.8mm TDFN33-12 package. The device is rated over the -40C to +85C temperature range.
AAT1142
Features
* * * * * * * * * * * * * * *
SwitchRegTM
* *
VIN Range: 2.7V to 5.5V VOUT Programmable Range: 0.6V to 2.0V Dynamic Voltage Management: -- 50mV Output Resolution -- Fast, Stable Response Serial Control Options: -- I2C Two-Wire Interface -- S2Cwire Single-Wire Interface 800mA Output Current Up to 93% Efficiency Line, Load Regulation Less Than 0.5% 2.2MHz Switching Frequency Ultra-Small External Filter Low 35A No Load Quiescent Current 100% Duty Cycle Low Dropout Operation Internal Soft Start Over-Temperature Protection Current Limit Protection Multi-Function MODE/SYNC Pin: -- PFM/PWM for High Efficiency -- PWM Only for Low Noise -- Clock Input to Synchronize to System Clock TSOPJW-12 or TDFN33-12 Package Temperature Range: -40C to +85C
Applications
* * * * * * * Camcorders Cellular Phones and Smartphones Digital Still Cameras Handheld Instruments Microprocessor / DSP Core MP3, Portable Music, and Portable Media Players PDAs and Handheld Computers
Efficiency vs. Load
Typical Application
VIN: 2.7V to 5.5V L1 VIN C2 4.7F LX 2.2H VOUT: 0.6V to 2.0V 800mA Maximum
(VOUT = 1.8V)
100 90
VIN = 3.6V VIN = 2.7V
Efficiency (%)
AAT1142
FB MODE/SYNC SDA SCL EN/SET AGND PGND C1 10F
80 70 60 50 40 30 0 1 10 100 1000
VIN = 4.2V VIN = 5.0V PWM Only Mode
I 2C S2Cwire*
*Optional S2Cwire or I2C Input
Output Current (mA)
1142.2006.07.1.0
1
800mA Voltage-Scaling Step-Down Converter Pin Descriptions
Pin #
TSOPJW-12 TDFN33-12
AAT1142
1
12
Symbol LX
2 3
11 10
PGND MODE/SYNC
4 5 6
9 8 7
SDA SCL EN/SET
7 8, 9, 10, 11 121 121 n/a n/a
6 4, 5 3 1 2 EP
FB AGND VIN PVIN N/C
Function Connect the output inductor to this pin. The switching node is internally connected to the drain of both high- and low-side MOSFETs. Main power ground return pin. Connect to the output and input capacitor return. Connect to ground for PFM/PWM mode and optimized efficiency throughout the load range. Connect to high for low noise PWM Only operation under all operating conditions. Connect to an external clock for synchronization (PWM Only). I2C control pin: Data input. I2C control pin: Clock input. IC enable pin. Pull high to enable the AAT1142; pull low to disable the AAT1142. Also serves as S2Cwire input for programmable output voltages. Feedback input pin. This pin is connected directly to the converter output for programmable output. Ground connection pin. Input voltage for the converter. Input voltage for the power switches. Not connected. Exposed paddle (bottom); connect to ground as closely as possible to the device.
Pin Configuration
TSOPJW-12 (Top View) TDFN33-12 (Top View)
LX PGND MODE/SYNC SDA SCL EN/SET
1 2 3 4 5 6
12 11 10 9 8 7
VIN AGND AGND AGND AGND FB
PVIN N/C VIN AGND AGND FB
1 2 3 4 5 6
12 11 10 9 8 7
LX PGND MODE/SYNC SDA SCL EN/SET
1. VIN and PVIN are tied together in the TSOPJW-12 package.
2
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800mA Voltage-Scaling Step-Down Converter Absolute Maximum Ratings1
Symbol
VIN, PVIN VLX VFB VSDA/SCL VMODE/SYNC, VEN/SET TJ TLEAD
AAT1142
Description
Input Voltage and Input Power to GND LX to GND FB to GND SDA/SCL to GND MODE/SYNC and EN/SET to GND Operating Junction Temperature Range Maximum Soldering Temperature (at leads, 10 sec)
Value
6.0 -0.3 to VIN + 0.3 -0.3 to VIN + 0.3 -0.3 to 6.0 -0.3 to 6.0 -40 to 150 300
Units
V V V V V C C
Thermal Information2
Symbol
PD JA
Description
Maximum Power Dissipation Thermal Resistance TSOPJW-12 TDFN33-124 TSOPJW-12 TDFN33-12
3
Value
625 2.0 160 50
Units
mW W C/W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Mounted on an FR4 board. 3. Derate 6.25mW/C above 25C. 4. Derate 20mW/C above 25C. 1142.2006.07.1.0
3
800mA Voltage-Scaling Step-Down Converter Electrical Characteristics1
L = 2.2H, CIN = COUT = 10F, VIN = 3.6V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = 25C. Symbol Description Conditions Min
2.7 VIN Rising Hysteresis VIN Falling IOUT = 0mA to 800mA, VIN = 2.7V to 5.5V COUT = 10F No Load EN/SET = AGND = PGND 250 2.0 -3.0 0.6 10 35 1.0 0.29 0.24 VIN = 5.5V, VLX = 0V to VIN VIN = 2.7V to 5.5V 250 From Enable to Output Regulation 1.0 140 15 100 2.2 3.0 0.2 1 70 1.0 3.0 2.0
AAT1142
Typ
Max Units
5.5 2.7 V V mV V % V mV/s A A A A %/V k s MHz MHz C C
Step-Down Converter VIN Input Voltage VUVLO VOUT VOUT VSLEW IQ ISHDN ILIM RDS(ON)H RDS(ON)L ILXLEAK VOUT/ VOUT*VIN ROUT TS FOSC FSYNC TSD THYS UVLO Threshold Output Voltage Tolerance VOUT Programmable Range Output Voltage Programming Slew Rate Quiescent Current Shutdown Current P-Channel Current Limit High Side Switch On Resistance Low Side Switch On Resistance LX Leakage Current Line Regulation Output Impedance Start-Up Time Oscillator Frequency SYNC Frequency Range Over-Temperature Shutdown Threshold Over-Temperature Shutdown Hysteresis
1. The AAT1142 is guaranteed to meet performance specifications over the -40C to +85C operating temperature range and is assured by design, characterization, and correlation with statistical process controls.
4
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter Electrical Characteristics1
L = 2.2H, CIN = COUT = 10F, VIN = 3.6V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = 25C. Symbol Description Conditions Min Typ Max Units
0.6 VEN/SET < 0.6V VEN/SET > 1.4V VEN/SET < 0.6V VEN/SET > 1.4V VIN = VFB = 5.5V 1.4 0.3 50 75 75 500 500 1.0 VIN x 0.4 V V s s s s A V V 1.0 A
AAT1142
EN/SET and MODE/SYNC VEN/SET(L) Enable Threshold Low VEN/SET(H) Enable Threshold High TEN/SET(L) EN/SET Low Time TEN/SET(H) EN/SET High Time TOFF EN/SET Timeout TLATCH EN/SET Latch Timeout IEN/SET Input Low Current VMODE/SYNC(L) VMODE/SYNC(H) IMODE/SYNC Enable Threshold Low Enable Threshold High Input Low Current
-1.0
VIN x 0.7 -1.0
Characteristics of SDA and SCL Bus Lines
Standard Mode Fast Mode
Parameter
SCL Clock Frequency Hold Time for START Condition; After this Period, the First Clock Pulse is Generated LOW Period of the SCL Clock HIGH Period of the SCL Clock Set-up Time for a Repeated START Condition Data in Hold Time Data in Set-Up Time Set-Up Time for STOP Condition Bus Free Time Between a STOP and START Condition Input Low Level Input High Level
Symbol
fSCL tHD;STA
Min
4.0
Max
100
Min
0.6
Max
400
Units
kHz s
tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tSU;STO tBUF VIL VIH
4.7 4.0 4.7 0 350 4.0 4.7 3.45
1.3 0.6 0.6 0 350 0.6 1.3 0.9
s s s s ns s s V V
VIN * 0.3 VIN * 0.7 VIN * 0.7
VIN * 0.3
1. The AAT1142 is guaranteed to meet performance specifications over the -40C to +85C operating temperature range and is assured by design, characterization, and correlation with statistical process controls. 1142.2006.07.1.0
5
800mA Voltage-Scaling Step-Down Converter Typical Characteristics
Efficiency vs. Load
(VOUT = 0.9V)
100 2.0
AAT1142
DC Regulation
(VOUT = 0.9V)
Efficiency (%)
80 70 60 50 40 30 20 0
VIN = 4.2V
Output Accuracy (%)
90
VIN = 3.6V VIN = 2.7V
1.0
VIN = 2.7V
0.0
VIN = 3.6V
VIN = 5.0V
PWM Only Mode
-1.0
VIN = 4.2V
VIN = 5.0V
1
10
100
1000
-2.0 0 1 10 100 1000
Output Current (mA)
Output Current (mA)
Efficiency vs. Load
(VOUT = 1.0V)
100 90
DC Regulation
(VOUT = 1.0V)
2.0
Efficiency (%)
80 70 60 50 40 30 20 0
VIN = 4.2V
Output Accuracy (%)
VIN = 3.6V VIN = 2.7V
1.0
VIN = 2.7V
VIN = 3.6V
0.0
VIN = 5.0V
PWM Only Mode
VIN = 4.2V
-1.0
VIN = 5.0V
-2.0 1 10 100 1000
0
1
10
100
1000
Output Current (mA)
Output Current (mA)
Efficiency vs. Load
(VOUT = 1.2V)
100 90
DC Regulation
(VOUT = 1.2V)
2.0
VIN = 3.6V VIN = 2.7V VIN = 4.2V
Efficiency (%)
80 70 60 50 40 30 20 0
Output Accuracy (%)
1.0
VIN = 2.7V
VIN = 3.6V
PWM Only Mode VIN = 5.0V
0.0
VIN = 4.2V
-1.0
VIN = 5.0V
1
10
100
1000
-2.0 0 1 10 100 1000
Output Current (mA)
Output Current (mA)
6
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter Typical Characteristics
Efficiency vs. Load
(VOUT = 1.8V)
100 90 2.0
AAT1142
DC Regulation
(VOUT = 1.8V)
1.6 1.2 0.8 0.4 0.0 -0.4 -0.8 -1.2 -1.6 -2.0 0 1 10 100 1000
Output Accuracy (%)
VIN = 3.6V VIN = 2.7V
Efficiency (%)
80 70 60 50 40 30 0 1 10 100 1000
VIN = 5.0V VIN = 4.2V VIN = 2.7V VIN = 3.6V
VIN = 4.2V VIN = 5.0V PWM Only Mode
Output Current (mA)
Output Current (mA)
Soft Start
(VIN = 3.6V; VOUT = 1.8V; IOUT = 800mA)
Line Regulation
(VOUT = 1.0V)
3.5 3
Output and Enable Voltage (top) (V)
4.0 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -4.0
1.00
Output Accuracy (%)
0.75 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 2.5 3.0 3.5
2.5 2 1.5 1 0.5 0 -0.5
IOUT = 650mA
Inductor Current (bottom) (A)
IOUT = 100mA
4.0 4.5
IOUT = 0mA
5.0 5.5
Time (50s/div)
Input Voltage (V)
Output Voltage Accuracy vs. Temperature
(VIN = 3.6V; VOUT = 1.0V; IOUT = 400mA)
2.0 1.5 4.0 2.0
Switching Frequency vs. Temperature
(VIN = 3.6V; VOUT = 1.0V; IOUT = 400mA)
Accuracy (%)
Variation (%)
-30 -20 -10 0 10 20 30 40 50 60 70 80
1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -40
0.0 -2.0 -4.0 -6.0 -8.0 -10.0 -40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Temperature (C)
Temperature (C)
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7
800mA Voltage-Scaling Step-Down Converter Typical Characteristics
P-Channel RDS(ON) vs. Input Voltage
450 400 450
AAT1142
N-Channel RDS(ON) vs. Input Voltage
125C
RDS(ON)L (m)
400
RDS(ON)H (m)
100C 85C
350 300 250 200 150 2.5
125C 100C 85C
350 300 250 200 2.5 3 3.5 4 4.5 5
25C
25C
3 3.5 4 4.5 5 5.5 6 6.5
5.5
6
6.5
Input Voltage (V)
Input Voltage (V)
Load Transient Response
(10mA to 400mA; VIN = 3.6V; VOUT = 1.2V)
1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2
Load Transient Response
(400mA to 800mA; VIN = 3.6V; VOUT = 1.0V)
3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2
Load and Inductor Current (bottom) (200mA/div)
Load and Inductor Current (bottom) (200mA/div)
Output Voltage (top) (V)
Time (50s/div)
Output Voltage (top) (V)
Time (50s/div)
No Load Quiescent Current vs. Input Voltage
(VOUT = 1.8V)
60
0.2
Line Response
(VOUT = 1.2V; IOUT = 650mA)
6.0 5.5
Supply Current (A)
55
Output Voltage (top) (VAC)
50 45 40 35 30 25 20 2.5 3.0 3.5 4.0 4.5 5.0 5.5
85C 25C -40C
0.1 0.0 -0.1 -0.2 -0.3
Input Voltage (bottom) (V)
5.0 4.5 4.0 3.5 3.0
6.0
-0.4
Input Voltage (V)
Time (500s/div)
8
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter Typical Characteristics
Output Ripple
(VIN = 4.2V; VOUT = 0.8V; No Load)
0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 0.82 0.81 0.80 0.79 0.78 0.77 0.76 0.75 0.74 0.73 0.72
AAT1142
Output Ripple
(VIN = 4.2V; VOUT = 0.8V; IOUT = 650mA)
0.80 0.78 0.76 0.74 0.72 0.70 0.68 0.66 0.64 0.62 0.60
Output Voltage (top) (V)
Output Voltage (top) (V)
Inductor Current (bottom) (A)
Inductor Current (bottom) (A)
Time (4s/div)
Time (200ns/div)
Output Programming Step from 0.9V to 1.2V
(VIN = 3.6V; ROUT = 1.85)
1.30 1.20 1.10 1.00 0.90 0.80 0.70 0.60 0.50 0.40 0.30 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 1.30 1.20 1.10 1.00 0.90 0.80 0.70 0.60 0.50 0.40 0.30
Output Programming Step from 1.2V to 0.9V
(VIN = 3.6V; ROUT = 1.85)
0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40
Output Voltage (top) (V)
Output Voltage (top) (V)
Output Current (bottom) (A)
Output Current (bottom) (A)
Time (50s/div)
Time (50s/div)
1142.2006.07.1.0
9
800mA Voltage-Scaling Step-Down Converter Functional Block Diagram
FB VIN PVIN
AAT1142
MODE/SYNC
Voltage Reference
Err. Amp.
DH
EN/SET
Logic
LX
DL
SDA SCL
Control Logic
PGND AGND
Functional Description
The AAT1142 is a high performance, 800mA stepdown converter with an input voltage range from 2.7V to 5.5V. The AAT1142 uses Dynamic Voltage Management, which allows the system host to quickly set the output voltage through the integrated I2C or S2Cwire interface. Through this interface, the host can change the output voltage to track processor idle and active states, greatly extending battery life without degrading system performance. I2C provides an industry-standard, dual-line interface, while S2Cwire provides a single-line, highspeed serial interface. The 2.2MHz switching frequency allows the use of small external components. Only three external components are needed to program the output 10
from 0.6V to 2.0V. Typically, one 4.7F capacitor, one 10F capacitor, and one 2.2H inductor are required. The integrated low-loss MOSFET switches provide up to 93% efficiency. PFM operation maintains high efficiency under light load conditions (typically <50mA). Pulling the MODE/SYNC pin high allows optional PWM Only low noise mode. This maintains constant frequency and low output ripple across all load conditions. Alternatively, the IC can be synchronized to an external clock via the MODE/SYNC input. External synchronization can be maintained between 1MHz and 3MHz. At low input voltages, the converter dynamically adjusts the operating frequency prior to dropout to maintain the required duty cycle and provide accu-
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter
rate output regulation. Output regulation is maintained until the dropout voltage, or minimum input voltage, is reached. The AAT1142 achieves better than 0.5% output regulation across the input voltage and output load range. Maximum continuous load is 800mA. A current limit of 1A (typical) protects the IC and system components from short-circuit damage. Typical no load quiescent current is 35A. Thermal protection completely disables switching when the maximum junction temperature is detected. The junction over-temperature threshold is 140C with 15C of hysteresis. Once an over-temperature or over-current fault condition is removed, the output voltage automatically recovers. Peak current mode control and optimized internal compensation provide high loop bandwidth and excellent response to input voltage and fast load transient events. The output voltage is stable across all operating conditions, ensuring fast transitions with no overshoot or ringing. Soft start eliminates output voltage overshoot when the enable or the input voltage is applied. Under-voltage lockout prevents spurious start-up events. sation terminates the transconductance voltage error amplifier output. Loop stability and fast transient response are maintained across the entire input and output voltage range with a small 2.2H output inductor and 10F output capacitor.
AAT1142
Soft Start/Enable
Soft start limits the current surge seen at the input and eliminates output voltage overshoot. When pulled low, the enable input forces the AAT1142 into a low-power, non-switching state. The total input current during shutdown is less than 1A. The turn-on time from EN to output regulation is 100s (typical). Alternatively, the EN/SET pin serves as the input for S2Cwire single line control. Details of S2Cwire operation and timing diagrams are provided in the Applications Information section of this datasheet.
Current Limit and Over-Temperature Protection
Switching is terminated after entering current limit for a series of pulses to minimize power dissipation and stresses under overload and short-circuit conditions. Switching is terminated for seven consecutive clock cycles after a current limit has been sensed for a series of four consecutive clock cycles. Thermal protection completely disables switching when internal dissipation becomes excessive. The junction over-temperature threshold is 140C with 15C of hysteresis. Once an over-temperature or over-current fault condition is removed, the output voltage automatically recovers.
Control Loop
The AAT1142 is a peak current mode step-down converter. The current through the P-channel MOSFET (high side) is sensed for current loop control, as well as short-circuit and overload protection. A fixed slope compensation signal is added to the sensed current to maintain stability for duty cycles greater than 50%. The peak current mode loop appears as a voltage-programmed current source in parallel with the output capacitor. The output of the voltage error amplifier programs the current mode loop for the necessary peak switch current to force a constant output voltage for all load and line conditions. Internal loop compen-
Under-Voltage Lockout
Internal bias of all circuits is controlled via the VIN input. Under-voltage lockout (UVLO) guarantees sufficient VIN bias and proper operation of all internal circuitry prior to activation.
1142.2006.07.1.0
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800mA Voltage-Scaling Step-Down Converter
AAT1142
LX L1 2.2H C4 (optional) 0.1F
1 2
U1
1 2 3 4
VOUT C2 10F
LX PGND
VIN AGND
12 11 10 9 8 7
VIN
C1 4.7F
VIN
C3 (optional) 10F R1 0
MODE/SYNC AGND SDA SCL EN/SET
AAT1142 TSOPJW-12
AGND AGND FB
JP1 R5 (optional) 1.8K SDA SCL JP2
1 2
VIN
VIN
R4 1.8K
5 6
VIN
R3 10K
1 2 3
R2 (optional)
JP3 U1 AAT1142 TSOPJW-12 L1 CDRH2D14/2R2 C1 4.7F 10V 0805 X5R C2 10F 10V 0805 X5R C3 10F optional C4 0.1F optional R1 0 0603 R2 optional 0603 R3 10K 0603 R4, R5 1.8K 0603
Figure 1: AAT1142 Evaluation Board Schematic.
Applications Information
The AAT1142 output voltage may be programmed from 0.6V to 2.0V through I2C or S2Cwire serial interface. When using I2C or S2Cwire, the output voltage can be programmed across the entire output voltage range or in increments as small as 50mV (see Figure 2).
put. To ensure a disable event, the EN/SET pulse width must be greater than the latch time (500s maximum). The I2C serial interface requires a master to initiate all the communications with slave devices. The I2C protocol is a bidirectional bus allowing both read and write actions to take place; while the AAT1142 is a slave device and only supports the write protocol. The AAT1142 is a receiver-only (or write-only) slave device and the Read / Write (R/W) bit is set low. The AAT1142 address is preset to 0x14 (Hex).
I2C Serial Interface
The AAT1142 is compatible with the I2C interface, which is a widely used two-line serial interface. The I2C two-wire communications bus consists of SDA and SCL lines. SDA provides data, while SCL provides clock input. SDA data consists of an address bit sequence followed by a data bit sequence. SDA data transfer is synchronized to SCL rising clock edges. When using the I2C interface, EN/SET is pulled high to enable the output or low to disable the out-
I2C START and STOP Conditions
START and STOP conditions are initialized by the I2C bus master. The master determines the START (beginning) and STOP (end) of a transfer with the slave device. Prior to initiating a START or after STOP, both the SDA and SCL lines are in bus-free mode. Bus-free mode is when SDA and SCL are both in the high state (see Figure 3).
12
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter
2.5
AAT1142
Output Voltage Level (V)
2.0 1.8 (default) 1.5
1.0
0.5
0.0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 32
I2C/S2Cwire Register
Figure 2: AAT1142 Graphical Output Voltage Programming Map.
START SDA SCL
STOP SDA SCL
Figure 3: I2C Start and Stop Conditions. START: A High "1" to Low "0" Transition on the SDA Line While SCL is High "1" STOP: A Low "0" to High "1" Transition on the SDA Line While SCL is High "1"
I2C Address Bit Map
Figure 4 illustrates the address bit map format. The 7-bit address is sent with the Most Significant Bit (MSB) first and is valid when SCL is high. This is followed by the R/W bit in the Least Significant Bit
(LSB) location. The R/W bit determines the direction of the transfer ('1' for read, '0' for write). The AAT1142 is a write-only device and this bit must be set low when communicating with the AAT1142. The Acknowledge bit (ACK) is set to low by the AAT1142 slave to acknowledge receipt of the address.
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800mA Voltage-Scaling Step-Down Converter
AAT1142
SCL
1 MSB
2
3
4
5
6
7
8
9
LSB A5 A4 A3 A2 A1 A0 R/W ACK
SDA
A6
Slave Address
Figure 4: I2C Address Bit Map; 7-bit Slave Address (A6-A0), 1-bit Read/Write (R/W), 1-bit Acknowledge (ACK).
I2C Data Bit Map
Figure 5 illustrates the data bit format. The 8-bit data is always sent with the most significant bit first and is valid when SCL is high. The ACK bit is set low by the AAT1142 slave device to acknowledge receipt of the data.
I2C Software Protocol
An I2C master / slave data transfer, detailing the address and data bits, is shown in Figure 6. The programming sequence is as follows: 1. Send a start condition 2. Send the I2C slave address with the R/W bit set low 3. Wait for acknowledge within the clock cycle 4. Send the data bits 5. Wait for acknowledge within the clock cycle 6. Send the stop condition
I2C Acknowledge Bit
The ACK bit is the ninth bit in the address and data byte. The master must first release the SDA line, and then the slave will pull the SDA line low. The AAT1142 sends a low bit to acknowledge receipt of each byte. This occurs during the ninth clock cycle of Address and Data transfers (see Figures 5 and 6).
SCL
1 MSB
2
3
4
5
6
7
8
9
LSB D6 D5 D4 D3 D2 D1 D0 ACK
SDA
D7
Data
Figure 5: I2C Data Bit Map; 8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
SCL
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
Start
0 0
Slave Address
1 0 1 0 0
R/W
0
ACK
0/1 0/1 0/1 0/1
Data
0/1 0/1 0/1 0/1 0/1
ACK Stop
0/1
7-bit address (0x14)
Figure 6: I2C SCL, SDA Transfer Protocol Example; 7-bit Slave Address (A6-A0 = 0x14), 1-bit Read/Write (R/W = 0), 1-bit Acknowledge (ACK), 8-bit Data (D7-D0), 1-bit Acknowledge (ACK). 14
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter
I2C Output Voltage Programming
The AAT1142 output voltage is programmed through the I2C interface according to Table 1. The data register encoded on the SCL and SDA lines determines the output voltage set-point after initial start-up. Upon power-up and prior to I2C programming, the default output voltage is set to 1.8V.
AAT1142
Data Register
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Data Bits D7 D6 D5 D4 D3 D2 D1 D0
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Output Voltage (V)
0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 (default) 1.85 1.90 1.95 2.00 2.00 2.00 2.00
Table 1: AAT1142 I2C Output Voltage Programming Map (X = don't care).
1142.2006.07.1.0
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800mA Voltage-Scaling Step-Down Converter
S2Cwire Serial Interface
AnalogicTech's S2Cwire serial interface is a proprietary high-speed single-wire interface. The S2Cwire interface records rising edges of the EN/SET input and decodes them into one of 32 registers which determines the output voltage, as shown in Table 2. Each state corresponds to an output voltage setting. When using the S2Cwire interface, both I2C inputs should be tied to the ground return. This disables the I2C functionality.
AAT1142
S2Cwire Serial Interface Timing
The S2Cwire serial interface has flexible timing. Data can be clocked-in at speeds up to 1MHz. After data has been submitted, EN/SET is held high to latch the data for a period TLAT. The output is subsequently changed to the predetermined voltage. When EN/SET is set low for a time greater than TOFF, the AAT1142 is disabled. When disabled, the data register is reset to the default value.
S2Cwire Timing Diagram
THI TLO T LAT TOFF
EN/SET
1 2 n-1 n 64
Data Reg
0
n-1
0
S2Cwire Output Voltage Programming
The AAT1142 is programmed through the S2Cwire interface according to Table 2. The rising clock edges received through the EN/SET pin corresponding to a given data register determine the output voltage set-point. Upon power-up and prior to S2Cwire programming, the default output voltage is set to 1.8V.
Rising Clock Edges/ Data Register
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Output Voltage (V)
No change 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35
Rising Clock Edges/ Data Register
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Output Voltage (V)
1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 (default) 1.85 1.90 1.95 2.00 2.00 2.00 2.00
Table 2: AAT1142 S2Cwire Output Voltage Programming Map.
16
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter Component Selection
Inductor Selection
The step-down converter uses peak current mode control with slope compensation to maintain stability for duty cycles greater than 50%. The output inductor value must be selected so the inductor current down slope meets the internal slope compensation requirements. The internal slope compensation for the programmable AAT1142 is 0.61A/sec. This equates to a slope compensation that is 75% of the inductor current down slope for a 1.8V output and 2.2H inductor.
AAT1142
CIN =
VO V * 1- O VIN VIN
VPP - ESR * FS IO
VO V 1 * 1 - O = for VIN = 2 * VO VIN VIN 4
CIN(MIN) =
1
VPP - ESR * 4 * FS IO
m=
0.75 VO 0.75 1.8V A = = 0.61 L 2.2H sec
Always examine the ceramic capacitor DC voltage coefficient characteristics when selecting the proper value. For example, the capacitance of a 10F, 6.3V, X5R ceramic capacitor with 5.0V DC applied is actually about 6F. The maximum input capacitor RMS current is:
VO V * 1- O VIN VIN
Manufacturer's specifications list both the inductor DC current rating, which is a thermal limitation, and the peak current rating, which is determined by the saturation characteristics. The inductor should not show any appreciable saturation under normal load conditions. Some inductors may meet the peak and average current ratings yet result in excessive losses due to a high DCR. Always consider the losses associated with the DCR and its effect on the total converter efficiency when selecting an inductor. The 2.2H CDRH2D14 series Sumida inductor has a 94m DCR and a 1.5A DC current rating. At full 800mA load, the inductor DC loss is 60mW which gives a 4.8% loss in efficiency for an 800mA, 1.0V output.
IRMS = IO *
The input capacitor RMS ripple current varies with the input and output voltage and will always be less than or equal to half of the total DC load current.
VO V * 1- O = VIN VIN
for VIN = 2 * VO
D * (1 - D) =
0.52 =
1 2
Input Capacitor
Select a 4.7F to 10F X7R or X5R ceramic capacitor for the input. To estimate the required input capacitor size, determine the acceptable input ripple level (VPP) and solve for C. The calculated value varies with input voltage and is a maximum when VIN is double the output voltage.
VO
IRMS(MAX) =
IO 2
The term VIN VIN appears in both the input voltage ripple and input capacitor RMS current equations and is a maximum when VO is twice VIN. This is why the input voltage ripple and the input capacitor RMS current ripple are a maximum at 50% duty cycle. The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the AAT1142. Low ESR/ESL X7R and X5R ceramic
V * 1- O
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800mA Voltage-Scaling Step-Down Converter
capacitors are ideal for this function. To minimize stray inductance, the capacitor should be placed as closely as possible to the IC. This keeps the high frequency content of the input current localized, minimizing EMI and input voltage ripple. Proper placement of the input capacitor (C1) is shown in the evaluation board layout in Figure 7. A laboratory test set-up typically consists of two long wires running from the bench power supply to the evaluation board input voltage pins. The inductance of these wires, along with the low-ESR ceramic input capacitor, can create a high Q network that may affect converter performance. This problem often becomes apparent in the form of excessive ringing in the output voltage during load transients. Errors in the loop phase and gain measurements can also result. Since the inductance of a short PCB trace feeding the input voltage is significantly lower than the power leads from the bench power supply, most applications do not exhibit this problem. In applications where the input power source lead inductance cannot be reduced to a level that does not affect the converter performance, a high ESR tantalum or aluminum electrolytic capacitor should be placed in parallel with the low ESR, ESL bypass ceramic capacitor. This dampens the high Q network and stabilizes the system. current demand. The relationship of the output voltage droop during the three switching cycles to the output capacitance can be estimated by:
3 * ILOAD VDROOP * FS
AAT1142
COUT =
Once the average inductor current increases to the DC load level, the output voltage recovers. The above equation establishes a limit on the minimum value for the output capacitor with respect to load transients. The internal voltage loop compensation also limits the minimum output capacitor value to 4.7F. This is due to its effect on the loop crossover frequency (bandwidth), phase margin, and gain margin. Increased output capacitance will reduce the crossover frequency with greater phase margin.
Thermal Calculations
There are three types of losses associated with the AAT1142 step-down converter: switching losses, conduction losses, and quiescent current losses. Conduction losses are associated with the RDS(ON) characteristics of the power output switching devices. Switching losses are dominated by the gate charge of the power output switching devices. At full load, assuming continuous conduction mode (CCM), a simplified form of the losses is given by:
IO2 * (RDS(ON)H * VO + RDS(ON)L * [VIN - VO]) VIN
Output Capacitor
The output capacitor limits the output ripple and provides holdup during large load transitions. A 4.7F to 10F X5R or X7R ceramic capacitor typically provides sufficient bulk capacitance to stabilize the output during large load transitions and has the ESR and ESL characteristics necessary for low output ripple. A smaller capacitor may result in slightly increased no load output regulation and output ripple with input voltages above 5V. This should be verified under actual operating conditions. The output voltage droop due to a load transient is dominated by the capacitance of the ceramic output capacitor. During a step increase in load current, the ceramic output capacitor alone supplies the load current until the loop responds. Within two or three switching cycles, the loop responds and the inductor current increases to match the load
PTOTAL =
+ (tsw * FS * IO + IQ) * VIN
IQ is the step-down converter quiescent current. The term tsw is used to estimate the full load stepdown converter switching losses. For the condition where the step-down converter is in dropout at 100% duty cycle, the total device dissipation reduces to:
PTOTAL = IO2 * RDS(ON)H + IQ * VIN
18
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter
Since RDS(ON), quiescent current, and switching losses all vary with input voltage, the total losses should be investigated over the complete input voltage range. Given the total losses, the maximum junction temperature can be derived from the JA for the TSOPJW-12 package which is 160C/W.
TJ(MAX) = PTOTAL * JA + TAMB
AAT1142
Layout
The suggested PCB layout for the AAT1142 in a TSOPJW-12 package is shown in Figures 7 and 8. The following guidelines should be used to help ensure a proper layout. 1. The input capacitor (C2) should connect as closely as possible to VIN (Pin 12) and PGND (Pin 2).
2. C1 and L1 should be connected as closely as possible. The connection of L1 to the LX pin (Pin 1) should be as short as possible. 3. The feedback pin (Pin 7) should be separate from any power trace and connected close to the VOUT terminal. Sensing along a high-current load trace will degrade VOUT load regulation. 4. The resistance of the trace from the GND terminal to PGND (Pin 2) should be kept to a minimum. This will help to minimize any error in DC regulation due to differences in the potential of the internal signal ground and the power ground. 5. Connect unused signal pins to ground to avoid unwanted noise coupling. When using S2Cwire, connect SDA and SCL to ground to disable I2C functionality. 6. When using the TDFN33-12 package, connect the exposed paddle (EP) to the GND plane.
Figure 7: AAT1142 Evaluation Board Top Side Layout (TSOPJW-12 Package).
Figure 8: AAT1142 Evaluation Board Bottom Side Layout (TSOPJW-12 Package).
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800mA Voltage-Scaling Step-Down Converter
Inductance (H)
2.2 2.2 2.2 2.2
AAT1142
Manufacturer
Sumida Sumida Taiyo Yuden Taiyo Yuden
Part Number
CDRH3D16-2R2 CDRH2D14-2R2 NR3010T2R2M CBC3225T2R2MR
Max DC Current (A)
1.20 1.50 1.10 1.13
DCR ()
0.072 0.094 0.095 0.080
Size (mm) LxWxH
3.8x3.8x1.8 3.2x3.2x1.55 3.0x3.0x1.0 3.2x2.5x2.5
Type
Shielded Shielded Shielded Non-Shielded
Table 3: Typical Surface Mount Inductors.
Manufacturer
MuRata MuRata MuRata MuRata
Part Number
GRM188R60J106ME47D GRM21BR60J106KE19L GRM188R60J475KE19D GRM21BR61A475KA73L
Type
Ceramic Ceramic Ceramic Ceramic
Value
10 10 4.7 4.7
Voltage
6.3 10 6.3 10
Temp. Co.
X5R X5R X5R X5R
Case
0603 0805 0603 0805
Table 4: Surface Mount Capacitors.
20
1142.2006.07.1.0
800mA Voltage-Scaling Step-Down Converter Ordering Information
Package
TSOPJW-12 TDFN33-12
AAT1142
Marking1
RIXYY
Part Number (Tape and Reel)2
AAT1142ITP-1.8-T1 AAT1142IWP-1.8-T1
All AnalogicTech products are offered in Pb-free packaging. The term "Pb-free" means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/pbfree.
Package Information
TSOPJW-12
+ 0.10 - 0.05
0.20
2.40 0.10
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
2.85 0.20
7 NOM 3.00 0.10
0.9625 0.0375
0.04 REF
0.15 0.05
+ 0.10 1.00 - 0.065
0.055 0.045
4 4
0.010
0.45 0.15 2.75 0.25
All dimensions in millimeters.
1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 1142.2006.07.1.0
21
800mA Voltage-Scaling Step-Down Converter
TDFN33-12
Index Area (D/2 x E/2)
AAT1142
Detail "B"
3.00 0.05
2.40 0.05
0.3 0.10 0.16 0.375 0.125 0.075 0.075 0.1 REF
Top View
Bottom View
Pin 1 Indicator (optional)
7.5 7.5
+ 0.05 0.8 -0.20
0.229 0.051
0.05 0.05
Option A: C0.30 (4x) max Chamfered corner
Option B: R0.30 (4x) max Round corner
Detail "B"
Side View
All dimensions in millimeters.
Detail "A"
(c) Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech's standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085 Phone (408) 737-4600 Fax (408) 737-4611 22
1142.2006.07.1.0
0.23 0.05
0.45 0.05
Detail "A"
3.00 0.05
1.70 0.05


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